Public | |
Traded as | |
---|---|
Industry | Software & Programming |
Founded | 1988; 31 years ago |
Headquarters | San Jose, California, United States |
Key people | Lip-Bu Tan, CEO |
Revenue | 2.146 billion USD (2018) |
$351 million USD (2018) | |
Number of employees | 7600 (Mar 30 2019) |
Website | cadence.com |
Cadence Design Systems, Inc. is an American multinationalelectronic design automation (EDA) software and engineering services company, founded in 1988 by the merger of SDA Systems and ECAD, Inc. The company produces software, hardware and silicon structures for designing integrated circuits, systems on chips (SoCs) and printed circuit boards.
The goal of the Cadence ® University Software Program is to grant easy access to leading electronic design automation (EDA) tools for educational institutions around the world. Our customers rely on skilled engineers entering the work force. As the leader in EDA, we are committed to helping our customers by giving future engineers access to our world-class tools.
- 4Lawsuits
- 5Acquisitions
Overview[edit]
Cadence Design Systems, headquartered in San Jose, California, in the North San Jose Innovation District, is a supplier of electronic design technologies and engineering services in the electronic design automation (EDA) industry. The company develops software used to design chips[1] and printed circuit boards,[2] as well as intellectual properties (IP) covering a broad range of areas, including interfaces, memory, analog, SoC peripherals, data plane processing units, and verification.
Cadence products primarily target SoC design engineers and are used to move a design into packaged silicon, with products for custom and analog design, digital design, mixed-signal design, verification, and package/PCB design, as well as a broad selection of IP, and also hardware for emulation and FPGA prototyping.
To help integrate, verify, and implement complex digital SoCs, there are solutions that encompass design IP, timing analysis and signoff, services, and tools and methodologies. The company also provides products that assist with the development of complete hardware and software platforms that support end applications.[3]
History[edit]
Cadence Design Systems was the result of a merger perfected in 1988 of Solomon Design Automation (SDA), co-founded in 1983 by Richard Newton, Alberto Sangiovanni-Vincentelli and James Solomon, and ECAD, co-founded by Glen Antle and Paul Huang in 1982. Joseph Costello was appointed as CEO from 1988–1997, and Cadence became the largest EDA company during his tenure.
Following Costello as CEO were Jack Harding (from 1997–99), Ray Bingham (from 1999-2005), and Mike Fister (from 2005-2008).
Following the resignation of Fister, the board appointed Lip-Bu Tan as acting CEO.[4] In January 2009, the company confirmed Lip-Bu Tan as President and CEO. Tan had been most recently CEO of Walden International, a venture capital firm, and remains chairman of the firm. He has served on the Cadence Board of Directors since 2004, where he served on the Technology Committee for four years.
In 2013, Cadence celebrated its 25th anniversary. In 2015, it was named one of the top 100 places to work by Fortune magazine.[5]
At the end of 2016, the company employed more than 7,100 people and reported 2016 revenues of approximately $1.82 billion.[6] In November 2007 Cadence was named one of the '50 Best Places to Work in Silicon Valley' by San Jose Magazine.[7]
According to Glassdoor, it is the fifth highest-paying company for employees in the United States as of April 2017.[8]
Products[edit]
Cadence's product offerings are targeted at various types of design and verification tasks which include:
- Custom IC technologies - Virtuoso Platform - Tools for designing full-custom integrated circuits;[9] includes schematic entry, behavioral modeling (Verilog-AMS), circuit simulation, custom layout, physical verification, extraction and back-annotation. Used mainly for analog, mixed-signal, RF, and standard-cell designs, but also memory and FPGA designs.
- Digital & Signoff technologies - RTL to GDS II implementation: Genus Synthesis, Conformal Equivalence Checker, Stratus High Level Synthesis, Joules Power Analysis, Innovus Place & Route, Quantus RC Extraction, Tempus Timing Signoff, Voltus Power Integrity Signoff, Modus Automatic Test Pattern Generation.
- System & Verification technologies - Verification Suite - JasperGold Formal Verification, Xcelium simulation, Palladium Z1 emulation, Protium S1 FPGA prototyping, Perspec software-driven tests, vManager plan & metrics, Indago debug, and Verification IP catalog.
- Intellectual Property - Design IP targeting areas including memory / storage / high-performance interface protocols (USB or PCIe controllers and PHYs), Tensilica DSP processors for audio, vision, wireless modems and convolutional neural nets. Tensilica DSP processors IP[10] include:
- Tensilica Vision DSPs for Imaging, Vision and AI processing
- Tensilica HiFi DSPs for Audio/Voice/Speech processing
- Tensilica Fusion DSPs for IoT
- Tensilica ConnX DSPs for Radar, Lidar, and Communications processing
- Tensilica DNA Processor Family for AI acceleration
- PCB & Packaging technologies: Allegro Platform - Tools for co-design of integrated circuits, packages, and PCBs,[11] including the Specctraauto-router. OrCAD/PSpice - Tools for smaller design teams and individual PCB designers.,[11] and Sigrity technologies - Tools for signal and power verification for system-level signoff verification and interface compliance.[12]
In addition to EDA software, Cadence provides contracted methodology and design services as well as silicon design IP, and has a program aimed at making it easier for other EDA software to interoperate with the company's tools.
Lawsuits[edit]
Avanti Corporation[edit]
Cadence was involved in a 6-year-long legal dispute[13] with Avanti Corporation, in which Cadence claimed Avanti stole Cadence code, and Avanti denied it. According to Business Week 'The Avanti case is probably the most dramatic tale of white-collar crime in the history of Silicon Valley'.[13] The Avanti executives eventually pleaded no contest and Cadence received several hundred million dollars in restitution. Avanti was then purchased by Synopsys, which paid $265 million more to settle the remaining claims.[14] The case resulted in a number of legal precedents.[15]
Mentor Graphics[edit]
The Cadence group Quickturn was also involved in a series of legal events with Mentor Graphics/Aptix. Mentor purchased rights to an Aptix patent, then sued Cadence. In this case, the CEO of Aptix, Amr Mohsen, forged a notebook in order to make the patent case stronger. When suspicions were raised, he staged a break-in of his own car to get rid of the evidence, resulting in charges of obstruction of justice. Trying to avoid this, he attempted to flee the country, only to be caught with an illegal passport and a pile of cash. While in jail for this offense, he was recorded offering money to intimidate witnesses and kill the judge.[16] In order to fight the new charges, he tried to feign psychological problems, but left a trail of evidence of his research into this defense, and how it might be done. He was charged with attempting to delay a federal trial by feigning incompetency,[17] but was convicted anyway.[18] According to the lawyers concerned, the original notebooks were not needed for the trial. The patent filing date, which was not in dispute, would have sufficed.
Acquisitions[edit]
Timeline[edit]
- August 1993: acquired Comdisco Systems Inc, a provider of network design and optimization software.
- May 1997: acquired Cooper & Chyan Technology (CCT), a provider of PCB and IC automatic place and router software solutions (Specctra).[19]
- December 1998: acquired Quickturn Design Systems, Inc., a market leader in microchip emulation.[20]
- June 1999: acquired OrCAD Systems, a market leader in shrink-wrap PCB Design Tools.[21]
- October 2002: acquired IBM's Test Design Automation group.[citation needed]
- January 2003: acquired Celestry Design Inc, a provider of fast-spice and reliability simulators.
- September 2003: acquired Verplex Systems, a provider of Formal Verification products, Conformal Solutions and Blacktie Property Checker.[22]
- April 6, 2004: acquired Neolinear Technology, a privately held company specializing in rapid analog design technology.[23]
- April 7, 2005: acquired Verisity, Ltd., a provider of verification process automation solutions ($315 million in cash).
- In 2007, the company began talks with Kohlberg Kravis Roberts and Blackstone Group regarding a possible sale of the company.[24]
- July 12, 2007: acquired Invarium, a photolithography specialist.
- August 15, 2007: acquired Clearshape, a developer of Design for Manufacturability (DFM) technology.[25]
- March 11, 2008: acquired ChipEstimate.com, an IP Portal and developer of IC planning and IP reuse management tools.[26]
- August 15, 2008: Cadence withdrew a $1.6 billion offer to purchase rival Mentor Graphics.[27]
- June 17, 2010: completed acquisition of Denali Software.[28]
- May 10, 2011: acquired Altos Design Automation, Inc., vendor of standard and complex cell libraries for the delivery of complex SoCs at advanced nodes.[29]
- July 12, 2011: acquired Azuro, creator of clock concurrent optimization technology.[30]
- July 2, 2012: acquired Sigrity, a leader in high-speed PCB and IC packaging analysis[31]
- February, 2013: acquired Cosmic Circuits, a provider of analog and mixed signal intellectual property (IP) cores. Cosmic Circuits offers IP products in connectivity and mixed-signal technologies in the 40 nm and 28 nm process nodes, with 20 nm and FinFET in development.[32] The acquisition was completed in May 2013.
- March, 2013: acquired Tensilica, known for Dataplane Processing Units (DPU). Tensilica provides configurable and extensible processors along with DPUs for audio, baseband, imaging etc. It has 200 licensees and has shipped 2 billion cores so far.[33]
- June, 2013: completed acquisition of the IP business of Evatronix, SA SKA of Poland. This acquisition brings to Cadence IP including certified USB 2.0/3.0, MIPI, display, and storage controllers.[34]
- February 14, 2014: acquired Forte Design Systems, a provider of high-level synthesis (HLS) software products. This includes Cynthesizer, a SystemC-based behavioral synthesis tool that enables design creation at a higher level of abstraction.
- June 16, 2014: completed acquisition of Jasper Design Automation, Inc., a market and technology leader in the fast-growing formal analysis sector.[35]
- April 28, 2016: completed acquisition of Rocketick Technologies, Ltd., an Israel-based pioneer and leading provider of multi-core parallel simulation.[36]
- November 1, 2017: completed acquisition of nusemi inc, a Mountain View based provider of serial communication IP [37]. The acquisition resulted in Cadence's leading position in the high speed serial communication market.[38], [39].
The company has also acquired Valid Logic Systems, High Level Design (HLD), UniCAD, CadMOS, Ambit Design Systems, Simplex, Silicon Perspective, Plato and Get2Chip.
Denali Software[edit]
Denali Software, Inc. was an American software company, based in Sunnyvale, California, now acquired by Cadence.[40] The company produces electronic design automation (EDA) software, intellectual property (IP) and design cores and platforms for memory, other standard interfaces and system-on-chip (SoC) design and verification. It has its engineering offices in Sunnyvale, Austin and Bangalore. Incorporated in 1996, Denali is headquartered in Sunnyvale, California and serves the global electronics industry with direct sales and support offices in North America, Europe, Japan and Asia.
On May 2010, Cadence Design Systems announced that it would acquire Denali for $315 million.[41]
Valid Logic Systems[edit]
Valid Logic Systems was one of the first commercial electronic design automation (EDA) companies, now acquired by Cadence. It was founded in the early 1980s,[42] along with Daisy Systems Corporation and Mentor Graphics, collectively known as DMV. The engineering founders were L. Curtis Widdoes,[43] Tom McWilliams[44] and Jeff Rubin,[45] all of whom had worked on the S-1 supercomputer project at Livermore Labs.
Valid acquired several companies such as Telesis (PCB layout),[46] Analog Design Tools,[47] and Calma (IC layout). In turn, Valid was acquired by Cadence Design Systems in the early 90s.[48]
Valid built both hardware and software, for schematic capture, logic simulation, static timing analysis, and packaging. Much of the initial software base derived from SCALD ('Structured Computer-Aided Logic Design'), a set of tools developed to support the design of the S-1 supercomputer at Lawrence Livermore National Laboratory.[49] Later, Valid expanded into IC design tools and into printed circuit board layout.
At first, Valid ran schematic capture on a proprietary UNIX workstation, the SCALDSystem, with static timing analysis, simulation, and packaging running on a VAX or IBM-compatible mainframe. However, by the mid-1980s, general purpose workstations were powerful enough, and significantly cheaper. Companies such as Mentor Graphics and Cadence Design Systems sold software only for such workstations. By 1990, almost all Valid software was also running on workstations, primarily those from Sun Microsystems.
Notable persons[edit]
- Alberto Sangiovanni-Vincentelli, co-founder[50]
- Richard Newton, co-founder
- James Solomon, co-founder
- Ken Keller, co-founder. Inventor of EDA framework including data store, portable window system, and layout editor
- Jiri Soukup, co-founder
- Ken Kundert, fellow. Creator of the Spectre circuit simulation family of products (including SpectreRF) and the Verilog-A analog hardware description language
- Joseph Costello, CEO, 1988–1997
- Lip-Bu Tan, CEO, 2009–present
- Anirudh Devgan, President, 2017-present
See also[edit]
References[edit]
- ^Design on Diagonal Path in Pursuit of a Faster Chip, John Markoff, The New York Times, February 26, 2007
- ^Cadence Acquires Software Company, The New York Times, April 11, 1990. Article describes Cadence acquiring a printed circuit design software company.
- ^'Resource Library'. www.cadence.com.
- ^Dylan McGrath, EE Times, 'Analysis: With Fister gone, Cadence layoffs may be next'. Retrieved March 3rd, 2012.
- ^'Cadence'. Fortune. 2015-03-05. Retrieved 2017-04-21.
- ^Source: Cadence Design Systems fact sheet, http://www.cadence.com/rl/Resources/financial_reports/cadenceataglance.pdf
- ^'Best Places to Work For'(PDF). Archived from the original on 21 November 2008. Retrieved 12 July 2017.CS1 maint: BOT: original-url status unknown (link)
- ^Verhage, Julie (April 12, 2017). 'These Are the Highest-Paying Companies in America'. Bloomberg Business. Retrieved April 18, 2017.
- ^'Course description from University of Colorado'. Archived from the original on 2007-06-24. Retrieved 2007-06-10.
- ^'Tensilica Customizable Processor and DSP IP'. ip.cadence.com. Retrieved 2019-05-16.
- ^ ab'UNIX Software and CAD tools'. Carleton University. Archived from the original on 2012-04-30. Retrieved 2007-06-10.
- ^Sigrity
- ^ abBusiness Week overview of the entire case, after the criminal trial but before the purchase by Synopsys.
- ^EEDesign article about the final settlement.
- ^Cadence v. Avanti: The UTSA and California Trade Secret LawArchived 2012-07-07 at Archive.today, Danley, J., Berkeley Technology Law Journal, 2004, Vol 19; Part 1, pages 289-308
- ^In Courts, Threats Become Alarming Fact of Life, Deborah Sontag, The New York Times, 20 March 2005
- ^Odd legal saga takes an ugly turn, Richard Goering, EE Times, 02 August 2004
- ^Jury finds Mohsen guilty of perjury, obstruction of justice, Dylan McGrath, EE Times, 28 February 2006
- ^'Cadence Design Systems Annual Report, 1997'., page 14
- ^'Cadence to Acquire Quickturn Design'. The New York Times. 10 December 1998. Retrieved 3 April 2015.
- ^'Update: Cadence gets lift from Orcad purchase'. EETimes.
- ^Santarini, Michael (July 14, 2003). 'Cadence buys formal tool vendor Verplex'. EE Times. Retrieved December 21, 2017.
- ^Times, EE (April 6, 2004). 'Cadence acquires analog layout vendor Neolinear'. EE Times.
- ^Specialized Software Maker Is Said to Be in Buyout Talks, Andrew Ross Sorkin and Michael J. de la Merced, The New York Times,Published: June 4, 2007
- ^'Cadence Design Systems buys chip design co., Clear Shape | VentureBeat'. venturebeat.com. Retrieved 2017-12-20.
- ^Leopold, George (March 21, 2008). 'Cadence buys IP reuse specialist Chip Estimate'. EE Times. Retrieved December 20, 2017.
- ^'Cadence Withdraws Proposal to Acquire Mentor Graphics'.
- ^'Cadence Completes Acquisition of Denali'. 17 Jun 2010. Retrieved 27 May 2012.
- ^'Cadence Acquires Altos Design Automation'.
- ^Former Azuro CEO Explains Clock Concurrent Optimization
- ^[1]
- ^'Cadence Expands IP Portfolio with Agreement to Acquire Cosmic Circuits'.
- ^'Cadence to Acquire Tensilica'.
- ^Source: http://www.cadence.com/cadence/newsroom/press_releases/Pages/pr.aspx?xml=061313_Evatronix
- ^Source: http://www.cadence.com/cadence/newsroom/press_releases/pages/pr.aspx?xml=061614_jasper
- ^Source: https://www.prnewswire.com/news-releases/cadence-completes-acquisition-of-rocketick-technologies-300259222.html
- ^Source: https://www.cadence.com/content/cadence-www/global/en_US/home/company/newsroom/press-releases/pr/2017/cadence-to-expand-high-speed-communications-ip-portfolio-with-ac.html
- ^Source: https://community.cadence.com/cadence_blogs_8/b/breakfast-bytes/posts/nusemi
- ^ Source: https://www.businesswire.com/news/home/20190514005428/en/Cadence-Tapes-112G-Long-Reach-SerDes-IP-Samsung
- ^Denali Software. 'EDA / IP Solutions for SoC Design and Verification – Denali Software'.
- ^'EE Times - Electronic Engineering Times - Connecting the Global Electronics Community'. EETimes.
- ^Kenneth N. Gilpin; Todd S. Purdum (November 14, 1985). 'BUSINESS PEOPLE; Intel Manager Becomes President of Valid Logic'. The New York Times. Retrieved 2013-10-17.
- ^Donald MacKenzie (1998). Knowing machines: essays on technical change. MIT Press. ISBN0-262-63188-1.
- ^Timothy Prickett Morgan (13 April 2009). 'Big-iron brains powers Schooner appliance power - Putting a ding in server size'. Servers. The Register. Retrieved 2011-09-22.
- ^'Electronic Business'. 9. Cahners. 1983: 231.Cite journal requires
|journal=
(help) - ^'Business: Valid Logic to Buy Firm'. San Jose Mercury News. February 6, 1987. p. 13E. Retrieved 2013-10-17.
- ^'Company News: Valid Logic to Buy Analog Design'. The New York Times. November 23, 1988. Retrieved 2013-10-17.
- ^'Business: Cadence to Buy Rival Valid'. San Jose Mercury News. October 3, 1991. p. 1E. Retrieved 2013-10-17.
- ^McWilliams, T.M.; Widdoes, L.C. Jr.; Wood, L.L. (1977-09-30). 'Advanced digital processor technology base development for Navy applications: the S-1 project'. Lawrence Livermore National Laboratory.Cite journal requires
|journal=
(help) - ^Bailey, Brian (December 20, 2017). 'Alberto Sangiovanni-Vincentelli receives EDAA Lifetime Achievement Award'. EE Times.
External links[edit]
Retrieved from 'https://en.wikipedia.org/w/index.php?title=Cadence_Design_Systems&oldid=915785733'
BENGALURU, April 4, 2019 /PRNewswire/ --
Highlights:
- The CloudBurst platform, the latest addition to the Cadence Cloud portfolio, provides customers with fast and easy access to pre-installed Cadence design tools in a ready-to-use cloud environment built on either Amazon Web Services or Microsoft Azure
- Customers can now strategically complement their on-premises infrastructure with the massive scalability of the cloud to address the peak requirements of critical design projects
- The CloudBurst platform provides customers with secure, web-based access to a cloud environment tailored to address challenges associated with compute-intensive workloads and massive file sizes of today's ICs and electronic systems
Cadence Design Systems, Inc. (NASDAQ: CDNS) today announced the availability of the new Cadence® CloudBurst™ Platform for hybrid cloud environments, providing customers with fast and easy access to pre-installed Cadence design tools in a ready-to-use cloud environment built on either Amazon Web Services (AWS) or Microsoft Azure. The new platform is the latest addition to the Cadence Cloud portfolio, and this continued innovation further advances Cadence's leadership position in cloud-based offerings for semiconductor and electronic system design. For more information on the new Cadence CloudBurst platform, please visit http://www.cadence.com/go/cloudburst .
(Photo: https://mma.prnewswire.com/media/846815/Cadence_Cloud_Portfolio.jpg )
The Cadence CloudBurst platform enables companies of all sizes to build upon the standard benefits of the broader Cadence Cloud portfolio - improved productivity, scalability, security and flexibility - with a deployment option that delivers a hybrid cloud environment in just a day or two after initial purchase versus the typical timeframes for internally provided cloud solutions that can take weeks to deploy. It offers customers a production-proven, Cadence-managed environment for compute-intensive EDA workloads with no tool installation or cloud set-up required so that engineers can stay focused on completing critical, revenue-generating design projects.
Additional benefits systems and semiconductor companies can achieve with the Cadence CloudBurst platform include:
- Ability to address today's design challenges: The platform provides convenient and secure browser-based access to the scale of cloud computing options and includes unique file-transfer technology that significantly accelerates the transfer speed of the massive files created by today's complex system-on-chip (SoC) designs.
- Ease of deployment: The platform complements existing on-premises datacenter investments and enables CAD and IT teams to easily address peak needs by providing a hybrid environment without requiring prior cloud expertise.
- Access to a broad set of Cadence tools: The platform supports a range of cloud-ready tools including functional verification, circuit simulation, library characterization and signoff tools, which benefit from cloud-scale compute resources.
- Streamlined ordering process: Customers can utilize existing ordering and licensing systems, eliminating sometimes lengthy legal and administrative hassles so customers can begin using the cloud for design projects quickly.
'Our vision is to continuously evolve our cloud offerings to remove barriers to adoption and make customers successful in their shift to the cloud regardless of legacy investments or level of cloud experience,' said Dr. Anirudh Devgan, president of Cadence. 'By adding the CloudBurst platform to our Cadence Cloud portfolio, we're providing customers with an unparalleled offering for hybrid cloud environments, which lets customers harness the full power of the cloud for SoC development.'
The broader Cadence Cloud portfolio consists of the new CloudBurst platform as well as the customer-managed Cloud Passport model and the Cadence-managed Cloud-Hosted Design Solution and Palladium® Cloud solutions. The Cadence-managed offerings provide customers with solutions that fully support TSMC's Open Innovation Platform® Virtual Design Environment (OIP VDE), an innovative service that provides a complete SoC design environment for customers to design securely in the cloud and enhance their productivity. The portfolio offerings support the broader Cadence System Design Enablement strategy, which enables systems and semiconductor companies to create complete, differentiated end products more efficiently.
Endorsements
'We successfully ran more than 500 million instances flat using the fully distributed Cadence Tempus Timing Signoff Solution on the CloudBurst platform via AWS to complete the tapeout of our latest networking chip on TSMC's 7nm process. This would have been impossible to achieve in the required timeframe if we hadn't deployed the Cadence hybrid cloud solution, which offered quick and easy access to the massive compute power we needed and a 10x productivity improvement over an on-premises static timing analysis approach for final signoff.'
- Dan Lenoski, chief development officer and co-founder, Barefoot Networks
'Optimizing a cloud architecture to support heavy-duty EDA workloads has been TSMC's primary focus for delivering cloud-ready design solutions to customers jointly with our Cloud Alliance partners. This new offering from Cadence has met TSMC's goal of the OIP VDE simplifying cloud adoption and demonstrated its ability to provide innovative service to our mutual customers with secure access to a simple-to-create, cloud-based environment that allows cloud bursting for peak needs, as well as accelerated completion of specific functions including simulation, signoff and library characterization without the typical challenges associated with hybrid cloud use models. We're already seeing customers achieve productivity gains and look forward to seeing many more successes.'
- Suk Lee, senior director of Design Infrastructure Management Division, TSMC
'More IC design companies are choosing to host their entire EDA workload in the cloud, but companies who have large datacenters at the core of their compute infrastructure may find hybrid cloud environments as a compelling starting point in their journey to the cloud. By utilizing the Cadence CloudBurst platform, customers can easily leverage the scale of Microsoft Azure in order to meet their peak capacity requirements, thereby speeding up the time-to-market for their complex designs.'
- Rani Borkar, corporate vice president, Microsoft Azure
About Cadence
Cadence enables electronic systems and semiconductor companies to create the innovative end products that are transforming the way people live, work and play. Cadence® software, hardware and semiconductor IP are used by customers to deliver products to market faster. The company's System Design Enablement strategy helps customers develop differentiated products - from chips to boards to systems - in mobile, consumer, cloud datacenter, automotive, aerospace, IoT, industrial and other market segments. Cadence is listed as one of Fortune Magazine's 100 Best Companies to Work For. Learn more at http://www.cadence.com.
© 2019 Cadence Design Systems, Inc. All rights reserved worldwide. Cadence, the Cadence logo and the other Cadence marks found at http://www.cadence.com/go/trademarks are trademarks or registered trademarks of Cadence Design Systems, Inc. All other trademarks are the property of their respective owners.
For more information, please contact:
Madhavi Rao
[email protected]
+91-80-41841111
Marketing Director
Cadence Design Systems (India) Pvt. Ltd.
[email protected]
+91-80-41841111
Marketing Director
Cadence Design Systems (India) Pvt. Ltd.
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